Wide dynamic range amplifier system

ABSTRACT

Amplifier systems and methods are provided that include a fixed gain amplification stage coupled to an adjustable attenuation stage further coupled to a variable gain amplification stage. A controller controls an amount of attenuation provided by the adjustable attenuation stage and an amount of gain provided by the variable gain amplification stage to maintain any of various noise, efficiency, and/or linearity requirements of the amplifier system.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit under 35 U.S.C. § 120 of co-pendingU.S. patent application Ser. No. 15/808,341 titled WIDE DYNAMIC RANGEAMPLIFIER SYSTEM filed on. Nov. 9, 2017, which claims the benefit under35 U.S.C. § 119(e) of U.S. Provisional Patent Application No. 62/420,875titled WIDE DYNAMIC RANGE AMPLIFIER SYSTEM filed on Nov. 11, 2016, eachof which is herein incorporated by reference in its entirety for allpurposes.

This application further relates to U.S. patent application Ser. No.15/808,486 filed on Nov. 9, 2017, and titled HIGH-LINEARITY VARIABLEGAIN AMPLIFIER WITH BYPASS PATH, which claims the benefit under 35U.S.C. § 119(e) of U.S. Provisional Patent Application No. 62/420,326titled HIGH-LINEARITY VARIABLE GAIN AMPLIFIER WITH BYPASS PATH filed onNov. 10, 2016, each of which is herein incorporated by reference in itsentirety for all purposes.

This application further relates to U.S. patent application Ser. No.15/808,389 filed on Nov. 9, 2017, and titled AMPLIFIER SYSTEM WITHDIGITAL SWITCHED ATTENUATOR, which claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application No. 62/420,681 titledAMPLIFIER SYSTEM WITH DIGITAL SWITCHED ATTENUATOR filed on Nov. 11,2016, each of which is herein incorporated by reference in its entiretyfor all purposes.

This application further relates to U.S. patent application Ser. No.15/808,372 filed on Nov. 9, 2017, and titled TRANSIENT OUTPUTSUPPRESSION IN AN AMPLIFIER, which claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application No. 62/420,907 titledTRANSIENT OUTPUT SUPPRESSION IN AN AMPLIFIER filed on Nov. 11, 2016,each of which is herein incorporated by reference in its entirety forall purposes.

This application further relates to U.S. patent application Ser. No.15/808,358 filed on Nov. 9, 2017, and titled REDUCING IMPEDANCEDISCONTINUITIES ON A SHARED MEDIUM, now U.S. Pat. No. 10,256,921, whichclaims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional PatentApplication No. 62/421,084 titled REDUCING IMPEDANCE DISCONTINUITIES ONA SHARED MEDIUM filed on Nov. 11, 2016, each of which is hereinincorporated by reference in its entirety for all purposes.

This application further relates to U.S. patent application Ser. No.15/808,458 filed on Nov. 9, 2017, and titled TEMPERATURE COMPENSATEDOSCILLATOR, which claims the benefit under 35 U.S.C. § 119(e) of U.S.Provisional Patent Application No. 62/420,806 titled TEMPERATURECOMPENSATED OSCILLATOR filed on Nov. 11, 2016, each of which is hereinincorporated by reference in its entirety for all purposes.

BACKGROUND

Data Over Cable Service Interface Specifications (DOCSIS) are developedby CableLabs, a non-profit consortium of cable operators focused ontechnologies and specifications for delivery of data signals that carryinformation such as data, video, voice, or other information, and fordelivery of additional next generation services. DOCSIS defines thesignal parameters for communications transmissions over a cable serviceinfrastructure.

Evolution in the cable industry, particularly in the cable televisionservice, has resulted in the reduction or elimination of traditionalanalog television channels that previously utilized frequencies as lowas 54 MHz in the United States. This has freed spectrum within the cablesystem infrastructure, and the progression of DOCSIS specifications hasbegun to incorporate more of this spectrum. DOCSIS 3.1, for example,specifies an upstream frequency range of 5 MHz up to 204 MHz, which isalmost 2.5 times the frequency range supported by DOCSIS 3.0, coveringmore than five and a third octaves. Additionally, full compliance withDOCSIS 3.1 requires support for power output up to 65 dBmV into 75 Ohmloads across the entire spectrum. Conventional amplifiers for thesesystems have not met the demanding challenges of power output dynamicrange across the wide spectrum range necessary for full compliance withDOCSIS 3.1 and anticipated future standards.

SUMMARY

Aspects and examples are directed to amplifier systems and componentsthereof, and to devices, modules, and systems incorporating the same.Amplifier systems and methods disclosed herein are capable of a highrange of dynamic power output across a broad frequency spectrum. In someexamples, a combination of amplification and attenuation components areapplied to meet various challenges of maintaining linearity and noiseoutput limits, among other criteria.

According to one aspect, a broadband amplifier assembly having a signalinput and a signal output is provided and includes a fixed gainamplifier having an input and an output, the input coupled to the signalinput, an adjustable attenuator having an input and an output, the inputof the adjustable attenuator being coupled to the output of the fixedgain amplifier, a variable gain amplifier having an input coupled to theoutput of the adjustable attenuator and an output coupled to the signaloutput, the variable gain amplifier having a substantially constantinput-referred linearity across a range of gain levels, and a controllerconfigured to control an amount of attenuation provided by theadjustable attenuator and an amount of gain provided by the variablegain amplifier.

Some embodiments include a bypass path switchably coupled in parallel tothe variable gain amplifier and one or more switches configured toswitchably route a signal through one of the variable gain amplifier andthe bypass path. The bypass path may include a bypass attenuator, andthe bypass attenuator may be a fixed attenuator. In some embodiments,the bypass attenuator has an input impedance substantially matched to anoutput impedance of the adjustable attenuator and an output impedancesubstantially matched to an impedance of the signal output. The inputimpedance may have a value different from a value of the outputimpedance in certain embodiments.

In some embodiments, the controller is further configured to maintainthe substantially constant input-referred linearity of the variable gainamplifier across a range of output power levels, at least in part bycontrolling a bias signal provided to the variable gain amplifier. Incertain embodiments, the controller is configured to adjust the biassignal based upon at least one of a desired signal level at the signaloutput, a signal level at the input of the variable gain amplifier, andan attenuation level of the adjustable attenuator. The controller may beconfigured to adjust the bias signal based upon at least one of alinearity criterion and an efficiency criterion. The controller may beconfigured to adjust the bias signal based upon a lookup table.

According to another aspect, a broadband amplifier assembly having asignal input and a signal output is provided and includes a fixed gainamplifier having an input and an output, the input coupled to the signalinput, an adjustable attenuator having an input and an output and havinga range of attenuation levels, the input of the adjustable attenuatorcoupled to the output of the fixed gain amplifier, a variable gainamplifier having an input coupled to the output of the adjustableattenuator and an output coupled to the signal output, the variable gainamplifier having a range of gain levels, and a controller configured tocontrol an amount of attenuation provided by the adjustable attenuatorand an amount of gain provided by the variable gain amplifier tomaintain a noise factor at the signal output across combinations of therange of gain levels and the range of attenuation levels.

Some embodiments include a bypass path switchably coupled in parallel tothe variable gain amplifier and one or more switches configured toswitchably route a signal through one of the variable gain amplifier andthe bypass path. The bypass path may include a bypass attenuator, andthe bypass attenuator may be a fixed attenuator. In some embodiments,the bypass attenuator has an input impedance substantially matched to anoutput impedance of the adjustable attenuator and an output impedancesubstantially matched to an impedance of the signal output. The inputimpedance may have a value different from a value of the outputimpedance in certain embodiments.

In certain embodiments, the controller is further configured to maintainthe noise factor in part by controlling a bias signal provided to thevariable gain amplifier. The controller may be configured to adjust thebias signal based upon at least one of a desired signal level at thesignal output, a signal level at the input of the variable gainamplifier, and an attenuation level of the adjustable attenuator. Thecontroller may be configured to adjust the bias signal based upon atleast one of a linearity criterion and an efficiency criterion. Thecontroller may be configured to adjust the bias signal based upon alookup table.

According to another aspect, a broadband amplifier assembly having asignal input and a signal output is provided and includes a fixed gainamplifier having an input and an output, the input coupled to the signalinput, an adjustable attenuator having an input and an output and havinga range of attenuation levels, the input of the adjustable attenuatorcoupled to the output of the fixed gain amplifier, a variable gainamplifier having an input coupled to the output of the adjustableattenuator and an output coupled to the signal output, the variable gainamplifier having a range of gain levels, and a controller configured tocontrol an amount of attenuation provided by the adjustable attenuator,to control a gain provided by the variable gain amplifier, and tocontrol a bias signal provided to the variable gain amplifier across therange of gain levels.

In certain embodiments, the controller is further configured to controlthe bias signal based upon at least one of a linearity criterion and anefficiency criterion.

In some embodiments, the controller includes a bias control coupled tothe variable gain amplifier to provide the bias signal to the variablegain amplifier, the bias signal being one of a bias current and a biasvoltage.

Some embodiments include a bypass path switchably coupled in parallel tothe variable gain amplifier and one or more switches configured toswitchably route a signal through one of the variable gain amplifier andthe bypass path. The bypass path may include a bypass attenuator, andthe bypass attenuator may be a fixed attenuator. In some embodiments,the bypass attenuator has an input impedance substantially matched to anoutput impedance of the adjustable attenuator and an output impedancesubstantially matched to an impedance of the signal output. The inputimpedance may have a value different from a value of the outputimpedance in certain embodiments.

According to some embodiments, the controller is configured to maintaina substantially constant input-referred linearity of the variable gainamplifier across a range of output power levels, at least in part bycontrolling the bias signal provided to the variable gain amplifier. Thecontroller may be configured to adjust the bias signal based upon atleast one of a desired signal level at the signal output, a signal levelat the input of the variable gain amplifier, and an attenuation level ofthe adjustable attenuator.

In some embodiments the controller is configured to adjust the biassignal based upon a lookup table.

According to another aspect, a multi-chip module having a signal inputand a signal output is provided and includes a first die constructedfrom a GaAs ED-pHEMT technology and including components that form afixed gain amplifier having an input and an output, the input of thefixed gain amplifier being coupled to the signal input, a second dieconstructed from a SOI technology and including components that form anadjustable attenuator having an input and an output, the input of theadjustable attenuator being coupled to the output of the fixed gainamplifier, and a third die constructed from a BCD-LDMOS technology andincluding components that form a variable gain amplifier having an inputand an output, the input of the variable gain amplifier being switchablycoupled to the output of the adjustable attenuator, and the output ofthe variable gain amplifier being switchably coupled to the signaloutput.

Certain embodiments include a fourth die constructed from a bulk CMOStechnology and including components that form a controller having aplurality of control outputs, the plurality of control outputs includinga first control output coupled to the fixed gain amplifier, a secondcontrol output coupled to the adjustable attenuator, and a third controloutput coupled to the variable gain amplifier.

In some embodiments, the second die further includes components thatform a signal switch, the signal switch being configured to provide theswitchable coupling between the output of the adjustable attenuator andthe input of the variable gain amplifier.

According to some embodiments, the second die further includescomponents that form a fixed attenuator, an input of the fixedattenuator being switchably coupled to the output of the adjustableattenuator and an output of the fixed attenuator being switchablycoupled to the signal output. A characteristic impedance of the outputof the fixed attenuator may be different from a characteristic impedanceof the input of the fixed attenuator.

Some embodiments also include a receive signal input and a receivesignal output, and an additional die including components that form areceive amplifier having an input coupled to the receive signal inputand having an output coupled to the receive signal output.

Still other aspects, examples, and advantages are discussed in detailbelow. Embodiments disclosed herein may be combined with otherembodiments in any manner consistent with at least one of the principlesdisclosed herein, and references to “an embodiment,” “some embodiments,”“an alternate embodiment,” “various embodiments,” “one embodiment” orthe like are not necessarily mutually exclusive and are intended toindicate that a particular feature, structure, or characteristicdescribed may be included in at least one embodiment. The appearances ofsuch terms herein are not necessarily all referring to the sameembodiment. Various aspects and embodiments described herein may includemeans for performing any of the described methods or functions.

In the event of inconsistent usages of terms between this document anddocuments incorporated herein by reference, the term usage in theincorporated references is supplementary to that of this document; forirreconcilable inconsistencies, the term usage in this documentcontrols.

BRIEF DESCRIPTION OF THE DRAWINGS

Various aspects of at least one example are discussed below withreference to the accompanying figures, which are not intended to bedrawn to scale. The figures are included to provide illustration and afurther understanding of the various aspects and examples, and areincorporated in and constitute a part of this specification, but are notintended as a definition of the limits of the invention. In the figures,identical or nearly identical components illustrated in various figuresmay be represented by like numerals. For purposes of clarity, not everycomponent may be labeled in every figure. In the figures:

FIG. 1 is a table of frequency spectrum for various data over cableservices interface specifications;

FIG. 2 is a graphical band plan of data over cable services frequencyallocation;

FIG. 3 is a schematic diagram of a data over cable services environment;

FIG. 4 is a schematic diagram of a cable modem;

FIG. 5A is a schematic diagram of an example of an amplifier systemaccording to aspects of the present disclosure;

FIGS. 5B-5D are graphs of performance characteristics of the amplifiersystem shown in FIG. 5A;

FIG. 6A is a schematic diagram of another example of an amplifier systemaccording to aspects of the present disclosure;

FIGS. 6B-6D are graphs of performance characteristics of the amplifiersystem shown in FIG. 6A;

FIG. 7A is a schematic diagram of another example of an amplifier systemaccording to aspects of the present disclosure;

FIGS. 7B-7E are graphs of performance characteristics of the amplifiersystem shown in FIG. 7A;

FIG. 8 is a schematic diagram of an example of a cable modem accordingto aspects of the present disclosure;

FIG. 9 is a schematic diagram of another example of an amplifier systemaccording to aspects of the present disclosure;

FIG. 10 are graphs of performance characteristics of an embodiment ofthe amplifier system shown in FIG. 9; and

FIG. 11 is a schematic diagram of another example of an amplifier systemaccording to aspects of the present disclosure.

DETAILED DESCRIPTION

It is to be appreciated that examples of the methods, systems, andapparatuses discussed herein are not limited in application to thedetails of construction and the arrangement of components set forth inthe following description or illustrated in the accompanying drawings.The methods, systems, and apparatuses are capable of implementation inother examples and of being practiced or of being carried out in variousways. Examples of specific implementations are provided herein forillustrative purposes only and are not intended to be limiting. Examplesdisclosed herein may be combined with other examples in any mannerconsistent with at least one of the principles disclosed herein, andreferences to “an example,” “some examples,” “an alternate example,”“various examples,” “one example” or the like are not necessarilymutually exclusive and are intended to indicate that a particularfeature, structure, or characteristic described may be included in atleast one example. The appearances of such terms herein are notnecessarily all referring to the same example. Also, the phraseology andterminology used herein is for the purpose of description and should notbe regarded as limiting. The use herein of “including,” “comprising,”“having,” “containing,” “involving,” and variations thereof is meant toencompass the items listed thereafter and equivalents thereof as well asadditional items. References to “or” may be construed as inclusive sothat any terms described using “or” may indicate any of a single, morethan one, and all of the described terms. Any references to front andback, left and right, top and bottom, upper and lower, and vertical andhorizontal are intended for convenience of description, not to limit thepresent systems and methods or their components to any one positional orspatial orientation.

Among other things, DOCSIS defines signal parameters for communicationstransmissions over a cable service infrastructure. The DOCSIS 3.1specification follows upon an earlier DOCSIS 3.0 specification andincludes significant changes to the interface specification for CableModems (CM's) and for Cable Modem Termination Systems (CMTS's). In asystem for data over cable service, multiple sites, or customerpremises, are typically connected to a common waveguide medium, such asa coaxial cable, that terminates at a hub operated by a cable operator.Each of the customer premises has one or more cable modems that receivedata signals from the hub in a downstream direction and transmit datasignals to the hub in an upstream direction. A cable modem terminationsystem is placed at the hub and receives the individual upstream datasignals from the cable modems and transmits the downstream data signals.Every data signal transmission is received by all other stations, CM'sor the CMTS, coupled to the common (i.e., shared) medium. The datasignals, downstream and upstream, include addressing informationidentifying to which cable modem they pertain, and each cable modem onthe common medium generally ignores data signals not intended for it.

The following discussion generally involves upstream transmissionsignals and equipment. The cable modems on a common medium receiveinstructions from the CMTS directing the cable modems as to signalformatting and transmission parameters each cable modem is to use forits upstream transmissions. In particular, once associated with thenetwork, each cable modem only transmits upstream data signals whencapacity on the shared medium is assigned, or allocated, to it by theCMTS. DOCSIS 3.0 standardized upstream transmissions by the cable modemsin two potential modes, TDMA mode and S-CDMA mode. Each mode includesfrequency and time slot allocations to the cable modems, i.e., FrequencyDivision Multiple Access (FDMA) and Time Division Multiple Access(TDMA). The CMTS communicates frequency and time allocations in aparticular Media Access Control (MAC) Management Message known as abandwidth allocation map (MAP) message. Time allocations are given inmini-slots that are an integer multiple of 6.25 microseconds (0).Modulation to be used by the cable modem is also assigned by the CMTSand is communicated in an Upstream Channel Descriptor (UCD) of a MACManagement Message. The fundamental upstream modulation scheme isquadrature amplitude modulation (QAM) with a constellation size up to128, and the coding scheme includes Reed-Solomon (R-S) Forward ErrorCorrection (FEC) coding, also with Trellis Coded Modulation (TCM) inNorth America. The S-CDMA mode further incorporates Synchronous CodeDivision Multiple Access (S-CDMA) as part of the modulation scheme.

According to DOCSIS 3.0, the spectrum available for allocation toupstream transmissions is from 5 MHz up to 85 MHz, just over fouroctaves. Depending upon the number of channels allocated, a cable modemmust support a data signal transmission burst with power output (to a 75Ohm medium, e.g., coaxial cable) per channel up to 53 dBmV or 56 dBmV inS-CDMA mode, and possibly up to 61 dBmV in TDMA mode. Power output fromeach cable modem is also controlled by the CMTS. In a process calledranging, the CMTS instructs each cable modem to increase or decreasetransmission power such that upstream data signals arriving at the CMTSarrive with substantially the same signal levels regardless of whichcable modem sent the signals. Cable modems that are further away fromthe CMTS on the shared medium may need to transmit with higher power tocompensate for additional attenuation associated with a physicallylonger propagation along the length of the cable. Cable modems closer tothe CMTS, along the shared medium, may need to transmit with lower powerbecause their signals travel a shorter distance along the cable,therefore experiencing less attenuation.

Evolution in the cable industry has freed spectrum within the cablesystem infrastructure, and the progression of DOCSIS specifications hasbegun to incorporate more of this spectrum. DOCSIS 3.1 specifies anupstream frequency range of 5 MHz up to 204 MHz, a significantly broaderfrequency range than DOCSIS 3.0. Full compliance with DOCSIS 3.1 alsorequires support for power output up to 65 dBmV into 75 Ohm loads acrossthe entire spectrum. Certain cable modem manufacturers may furtherrequire higher output signal levels, of, for example, 68 dBmV or higher.

The DOCSIS 3.1 specification also has strict requirements for NoiseFigure (NF), Modulation Error Ratio (MER) and spurious emissions acrossthe entire spectrum. Conventional cable modems have not been able tomeet the DOCSIS 3.1 specifications over the full 5-204 MHz spectrum andhave instead implemented only the newer modulation scheme of the DOCSIS3.1 specification over a conventional spectrum range of up to 42 MHz orup to 85 MHz. In the near future, however, demand will increase to thepoint that cable modem manufacturers will be required to support thefull spectrum of the DOCSIS 3.1 specification from 5-204 MHz.

In addition to the requirement to support power output up to 65 dBmV ormore into 75 Ohm loads across the entire upstream spectrum from 5-204MHz, with accompanying noise figure, modulation error ratio, andspurious emissions limitations, a cable modem also must be capable ofadjusting upstream output power to accommodate ranging operations of theCMTS, i.e., to adjust output power as instructed by the CMTS such thatthe data signals received at the CMTS from all cable modems in thesystem arrive with substantially the same power. A typical cable modemmay provide an output power adjustable in 1 dB steps from about 5 dBmVup to about 64 dBmV, with various noise figure, modulation error ratio,and spurious emission limits, across the DOCSIS 3.0 spectrum with a highend frequency of 42 MHz or 85 MHz. As described above, DOCSIS 3.1 morethan doubles this high end frequency to 204 MHz, while maintaining thelower edge of 5 MHz, with similarly stringent noise figure, modulationerror ratio, and spurious emission limits.

Radio Frequency (RF) power amplifier manufacturers for the cable modemindustry are challenged to design amplifiers capable of providingadjustable signal output powers spanning 58 dB or more (e.g., 10-68 dBmVat 75 Ohms) across a frequency band spanning more than 5 octaves (e.g.,5-204 MHz), while maintaining stringent noise figure and modulationerror ratio requirements across all output signal levels andfrequencies. Additionally, at least because cable modems connect to ashared medium, they are desired to behave well in other aspects, such asto present a consistent impedance to the cable to reduce signalreflections, and to limit spurious emissions.

FIG. 1 is a table illustrating frequency spectrum allocations made underDOCSIS 3.0 and 3.1. Each specifies at least one pair of low and highedge frequencies for a transmit range and for a receive range. The termstransmit and receive in the table are from the perspective of a cablemodem. That is, the transmit frequency range is the upstream range, fordata signals sent from a cable modem (CM) to a cable modem terminationsystem (CMTS), and the receive frequency range is the downstream range,for data signals sent from the CMTS to one or more CM's. It can be seenfrom the table of FIG. 1 that the DOCSIS standard has evolved over timeto increase the frequency allocations to each of the upstream (transmit)and downstream (receive) frequency ranges. At least in part, some of theadditional frequency ranges have become available for data signals overtime as the cable service industry has transitioned to digital for allservices, freeing up frequency ranges that were once used for analogtelevision channels. It can also be seen from the table of FIG. 1 thatDOCSIS 3.1 increased the upstream frequency range by more than doublethe maximum range of DOCSIS 3.0, increasing the total bandwidth by afactor of nearly 2.4, by extending the upper edge of the frequency rangefrom 85 MHz to 204 MHz. The full DOCSIS 3.1 upstream range spans morethan five and a third octaves, as compared to the maximum DOCSIS 3.0range of 5-85 MHz, at slightly over four octaves.

FIG. 2 is an illustration of the DOCSIS 3.1 frequency plan, with anx-axis for frequency, the upstream range of 5-204 MHz on a lower (left)range of the x-axis and the downstream range of 258-1794 MHz on an upper(right) range of the x-axis. DOCSIS 3.1 allows for some optional lowerranges, but a full, maximum bandwidth implementation of DOCSIS 3.1 is asshown. In addition to the extended frequency ranges and accordinglyexpanded bandwidths, DOCSIS 3.1 brings new modulation and coding schemesinto the cable data services industry. DOCSIS 3.1 implements orthogonalfrequency division multiple access (OFDMA) into the upstream channels,and allows allocation by the CMTS to the CM of a frequency range, ratherthan individual channels, and within the frequency range there aremultiple subcarriers of either 25 kHz or 50 kHz spacing. To allow forbackwards compatibility, a CMTS may continue to allocate channels withinDOCSIS 3.0 frequency ranges, modulation, and coding schemes.

FIG. 3 is a schematic diagram for data over cable service in aresidential environment implemented with a hybrid fiber-coaxinfrastructure. Shown in FIG. 3 are three distribution branches 300serving multiple houses, or customer premises 310, each connected by atleast one drop 320 from one of the distribution branches 300. Eachcustomer premises 310 has a cable modem connected to a coaxial cable.Customer premises 310 that are connected via the same distributionbranch 300 share a coaxial medium 330 in the neighborhood, such that alldata signal transmissions on the shared coaxial medium 330 may beobserved at, and may have an impact upon, other cable modems connectedto the shared coaxial medium 330. In a hybrid fiber-coax system likethat shown in FIG. 3, each distribution branch 300 coaxial medium 330connects to an optical node 340 that converts radio frequency (RF)electrical signals from the coaxial medium 330 to optical signals on afiber optic cable 350, and vice versa. The fiber optic cable 350delivers the optical signals to a cable modem termination system (CMTS)360. For purposes of the disclosure herein, the cable modems may beconsidered to communicate directly with the CMTS 360 via electricalradio frequency signals on the coaxial medium 330. Beyond the CMTS 360,and as shown for example in FIG. 3, the CMTS 360 may communicate with aregional router 370 and ultimately to a further network 380. Otherexamples of data over cable services may include other equipment and mayprovide services to commercial rather than residential customerpremises.

FIG. 4 is a simplified schematic diagram of an example of a cable modem.The cable modem 400 transmits upstream data signals to a CMTS andreceives downstream data signals from a CMTS. The cable modem 400includes a signal processor 410 that processes received downstream datasignals and generates upstream data signals for transmission. The signalprocessor 410 may operate in a digital domain and the cable modem 400may further include a digital to analog converter (DAC) 420 thatconverts the upstream signals into an analog form, and an analog todigital converter (ADC) 430 that converts the downstream signals intodigital form. An upstream amplifier 440 amplifies the upstream datasignals to a power level sufficient for the upstream data signals toreach the CMTS 360 (see FIG. 3) with enough signal strength for the CMTSto reliably receive the upstream data signals. A downstream amplifier450 amplifies received downstream data signals (from the CMTS) to asufficient level for the signal processor 410 to reliably receive thedownstream data signals. It should be appreciated that, for clarity,additional circuitry may be included that is not shown, such asup-converters for the transmit side and down-converters for the receiveside, for example. The downstream amplifier 450 is typically a low noiseamplifier (LNA) configured to sufficiently amplify the relatively lowsignal level of the received downstream data signal without addingsignificant noise. The output of the upstream amplifier 440 is coupledthrough a balun 460 to a duplexer 470 that couples the upstream datasignals to a coaxial cable 480, which is further operatively coupled toa shared coaxial medium 330 of FIG. 3. The duplexer 470 also couples thedownstream data signals from the coaxial cable 480 to provide thedownstream data signals to the downstream amplifier 450. The duplexer470 may include frequency selective filters to separate the downstreamdata signals arriving via the coaxial cable 480 from the upstream datasignals being provided to the coaxial cable 480. As shown in FIG. 4, theupstream amplifier 440 may be implemented as a differential amplifierhaving differential inputs (e.g., each of a positive and a negativeinput, or two inputs accommodating a magnitude difference) and having adifferential output (e.g., each of a positive and a negative output, ortwo outputs providing a magnitude difference). Additionally as shown inFIG. 4, the differential sides of one or more internal components of theupstream amplifier 440 may be coupled to a power supply voltage by eachof a pair of electrical elements, for example, inductors 490.

According to aspects disclosed herein, the cable modem 400 supports thefull upstream frequency range of DOCSIS 3.1 from 5 MHz up to 204 MHzwith selectable output signal power controlled in multiple steps. In atleast one embodiment, the cable modem 400 and the upstream amplifier 440support output signal power up to 68 dBmV into a 75 Ohm coaxial cablewith at least fifty nine (59) output signal power settings differing bya nominal 1 dB variation between adjacent settings. In some embodiments,the upstream amplifier 440 may include a multi-chip module including asubstrate with one or more die to implement various features of theupstream amplifier 440. In some embodiments the upstream amplifier 440may be included in a module that also includes the downstream amplifier450.

In some embodiments, the upstream amplifier 440 may provide acombination of amplification and attenuation to provide a plurality ofdistinct output signal power settings. In one example the number ofoutput signal power settings is fifty-nine. For example, the outputsignal power settings may span from a minimum output signal power of 10dBmV up to 68 dBmV, selectable in nominal 1 dB increments, for example,or may span other output signal powers or may provide alternateselectable increments. In at least one embodiment, the upstreamamplifier 440 provides a gain range of −23 dB to +35 dB.

An amplifier, such as the upstream amplifier 440, may be formed as anassembly, e.g., an amplifier assembly, of one or more stages havingvarious functions and may include control components, e.g., acontroller, that controls aspects of the stages and may have acommunication interface to receive configuration parameters andinstructions. The terms amplifier, amplifier assembly, and amplifiersystem may at times be used interchangeably herein and generally referto one or more stages coupled to receive an input signal and to providean output signal varying in signal level or power level. The termsamplifier, amplifier assembly, and amplifier system may at times referto objects that include control components in combination with the oneor more stages.

One approach to designing an amplifier assembly capable of providing abroad range of selectable gain settings, and accordingly output signalpower settings, is illustrated in FIG. 5A. FIG. 5A shows an amplifiersystem 500 including a fixed gain differential amplifier 510 and anadjustable attenuator 520. The adjustable attenuator 520 of FIG. 5Aprovides the adjustability to select gain values of the amplifier system500 overall. The adjustable attenuator 520 may have a range ofselectable attenuation levels, and may include a 0 dB attenuation levelsuch that, when selected, the adjustable attenuator 520 passes signalsfrom its input to its output substantially without attenuation.Accordingly, for the amplifier system 500 to have a maximum gain settingof 35 dB overall, the fixed gain amplifier 510 may have a fixed gain of35 dB, so that the amplifier system 500 provides a net +35 dB gain as acombination of the fixed gain amplifier 510 gain of 35 dB and theadjustable attenuator 520 gain of 0 dB. The adjustable attenuator 520may have fifty-nine selectable attenuation settings, in, for example, 1dB increments, to provide a range of attenuation from 0 dB to 58 dB.Accordingly, the combination of the fixed gain amplifier 510 and theadjustable attenuator 520 may provide a net gain range of −23 dB to +35dB by the amplifier system 500 overall.

FIGS. 5B-5D illustrate third order intermodulation, noise figure (NF),and power consumption, respectively, associated with the amplifiersystem 500 of FIG. 5A, as a function of output signal voltage level. Thegraphs of FIGS. 5B-5D represent an amplifier system 500 with a fixedgain amplifier 510 having a noise figure of 1 dB, an input-referencedthird order intersection point (IIP3) of 15 dBm, and anoutput-referenced third order intersection point (OIP3) of 50 dBm, andan adjustable attenuator 520 with IIP3 of 50 dBm. FIGS. 5B and 5C eachalso includes a dashed line that illustrates a DOCSIS 3.1 performancerequirement for the respective performance criteria. FIGS. 5B and 5Cshow that the performance of the amplifier system 500 satisfies theDOCSIS 3.1 requirements. FIG. 5D shows, however, that the amplifiersystem 500 consumes substantially the same amount of power across alloutput signal power settings. The amplifier system 500 consumessubstantially the same power at all gain settings, at least in part,because the fixed gain amplifier 510 operates at full power regardlessof the output signal power level. Lower output signal levels areprovided by the amplifier system 500 by absorbing an adjustable amountof the power in the adjustable attenuator 520. The result is thatselecting low output signal levels does not reduce power consumption andmay cause significant heating as the adjustable attenuator 520 convertsthe excess power to thermal energy.

Another approach to an amplifier assembly capable of providing a broadrange of selectable gain settings, and accordingly output signal powersettings, is illustrated in FIG. 6A. FIG. 6A shows an amplifier system600 including a first fixed gain amplifier 610, an adjustable attenuator620 and a second fixed gain amplifier 630. The adjustable attenuator 620again provides the adjustability to select gain values of the amplifiersystem 600 overall, similar to the amplifier system 500 discussed above.Again the adjustable attenuator 620 may have a range of selectableattenuation levels that range from 0 dB to 58 dB attenuation, forexample. As one example of fixed gain amplifier gain values, the firstfixed gain amplifier 610 may have a fixed gain of 15 dB and the secondfixed gain amplifier 630 may have a fixed gain of 20 dB, to provide amaximum net gain of +35 dB overall, which occurs when the adjustableattenuator 620 is set to provide substantially 0 dB of attenuation.Accordingly, similar to the amplifier system 500 discussed above, theamplifier system 600 may provide a net gain range of −23 dB to +35 dBoverall.

With continued reference to the amplifier system 600 of FIG. 6A, FIGS.6B-6D illustrate the same performance characteristics of the amplifiersystem 600 as those displayed in FIGS. 5B-5D for the amplifier system500. FIGS. 6B and 6C each also includes a dashed line for DOCSIS 3.1performance requirements. FIG. 6C shows that the amplifier system 600has worse noise figure characteristics than those of the amplifiersystem 500 discussed above. Specifically, FIG. 6C shows that at thelower range of output signal levels, the noise figure is significantlyhigher than for the amplifier system 500, and does not satisfy theDOCSIS 3.1 requirements. Similar to the amplifier system 500 discussedabove, the amplifier system 600 relies upon the selectable attenuationlevels of an adjustable attenuator 620 to provide the variability ofoutput signal levels. The amplifier system 600, however, has two fixedgain amplifiers, the noise characteristics of which combine poorly atthe lower gain settings as each may introduce noise. Additionally, FIG.6D shows that the amplifier system 600 consumes a substantially constantamount of power across all output signal levels, similar to theamplifier system 500 above, again because reduction in output signallevel is achieved by absorbing more power in the adjustable attenuator620 while the fixed gain amplifiers 610, 630 continue to provide aconstant gain and consume significant power. As is the case with theamplifier system 500, selecting low output signal levels for theamplifier system 600 does not reduce power consumption and may causesignificant heating as excess power is converted to thermal energy.

A third approach to an amplifier assembly capable of providing a broadrange of selectable gain settings, and accordingly output signal powersettings, involves providing adjustable gain in an amplifier element inaddition to an attenuator element as in the amplifier systems 500, 600discussed above. When some of the adjustable gain is provided in anamplifier element, an attenuator element may provide less of theadjustable gain. For example, and as shown in FIG. 7A, an amplifiersystem 700 includes an input stage 710, an adjustable attenuator 720,and an output stage 730. The input stage 710 may include a fixed gainamplifier, which may be a low noise amplifier (LNA). The adjustableattenuator 720 may be similar to those discussed above.

The output stage 730 is an adjustable gain element (e.g., variable gainamplifier circuit) including a variable gain amplifier 740 and a bypasspath 750. The bypass path 750 may include a fixed attenuator 760, whichmay attenuate the signal by a desired amount. While the amount ofattenuation may be selected based on a performance requirement of theoutput stage 730, in one example, the fixed attenuator 760 may include aloss pad which provides 4 dB of attenuation.

In certain examples, components and/or parameters of the output stage730 may be selected to achieve a desired impedance matching at its inputand its output. For instance, the output stage 730 may provide animpedance at its input that matches an output impedance of theadjustable attenuator 720, and the output stage 730 may present anoutput impedance that matches a cable or balun to be coupled to theoutput of the output stage 730. In certain examples, the variable gainamplifier 740 may have a 100 Ohm input impedance and a 75 Ohm outputimpedance, e.g., to match a 100 Ohm output impedance of the adjustableattenuator 720 and a 75 Ohm impedance of a coaxial cable, for instance.Accordingly, when the output stage 730 is in an amplify mode (forexample, one of three amplify modes described in further detail below),the variable gain amplifier 740 may provide impedance matching from theadjustable attenuator 720 to an output of the amplifier system 700overall.

In a bypass mode wherein a signal is routed through the bypass path 750instead of the variable gain amplifier 740, the fixed attenuator 760 mayprovide impedance matching from its input to its output, e.g., toprovide a 100 Ohm input to match the output of the adjustable attenuator720 while providing a 75 Ohm output to match a cable or balun connectedto the output of the output stage 730. In certain other examples, thebypass path 750 may not include the fixed attenuator 760 and instead maypass the signal directly between the input and output of the outputstage 730 during the bypass mode.

The variable gain amplifier 740 and the fixed attenuator 760, each partof the output stage 730, may be alternatively selected to provide anadjustable gain from, for example, −4 dB up to 20 dB, thus providing a24 dB range of selectable gain settings. With such an output stage 730,the adjustable attenuator 720 may provide a 35 dB range of selectableattenuation to achieve a 59 dB range of overall gain variability fromthe amplifier system 700. Examples of the output stage 730 are discussedin more detail below.

In at least one embodiment, the input stage 710 provides a fixed 15 dBgain, the adjustable attenuator 720 is a digital switched attenuator(DSA) that provides a range of attenuation from 0 to 34 dB in nominal 1dB increments, the fixed attenuator 760 is a loss pad that provides 4 dBof attenuation, and the variable gain amplifier 740 provides aselectable gain of 4, 12, or 20 dB by enabling a varying number ofamplifier elements as is discussed in more detail below. It is to beappreciated that the amplifier and attenuator components may be designedand constructed to provide any set of amplification gain and/orattenuation values, and embodiments described herein are not limited tospecific examples of gain and attenuation values or ranges described.Additionally, embodiments of an amplifier system may include additionalbypass circuitry providing different attenuation values or noattenuation, e.g., the bypass path 750 may not have a fixed attenuator760 and instead may pass a signal substantially without attenuation, orthere may be no bypass path 750. Additionally, the variable gainamplifier 740 may provide alternate gain values, including negative gainvalues, and may provide higher or lower gain values than thoseexplicitly described herein, and may provide more or fewer than threeamplify modes as described herein, in any combination to providevariable output signal levels to accommodate varying applications andoperational requirements.

Continuing with the particular above-described embodiment, examples ofoperating states are described that provide for gain settings rangingfrom a minimum net gain of −23 dB up to a maximum net gain of +35 dB.The minimum net gain of the amplifier system 700 is provided when theadjustable attenuator 720 is set to provide maximum attenuation (34 dBin this example) and the output stage 730 is configured to route asignal through the bypass path 750 that includes the fixed attenuator760. The resulting net gain of −23 dB is the combination of 15 dB gainof the input stage 710, −34 dB gain of the adjustable attenuator 720,and −4 dB gain of the fixed attenuator 760.

The maximum net gain of the amplifier system 700 is provided when theadjustable attenuator 720 is set to provide 0 dB of attenuation and theoutput stage 730 is configured to route a signal through the variablegain amplifier 740 set to provide 20 dB of gain. The resulting net gainof +35 dB is the combination of 15 dB gain of the input stage 710 and 20dB gain of the variable gain amplifier 740. The adjustable attenuator720 passes a signal without attenuation (0 dB) when the amplifier system700 is in a maximum gain operating state. For clarity, the gain settingsof the input stage 710, the adjustable attenuator 720, and the outputstage 730 are shown in Table 1 for the minimum and maximum net gainoperating states of this example of the amplifier system 700.

TABLE 1 Input Stage 710 Attenuator 720 Output Stage 730 Net Gain +15 dB−34 dB −4 dB −23 dB +15 dB 0 dB +20 dB +35 dB

Intermediate gain values between the minimum and maximum net gain of theamplifier system 700 overall, e.g., gain values between ≤23 dB and +35dB in the example discussed above, may be achieved by varyingcombinations of gain settings for the adjustable attenuator 720 and theoutput stage 730, as illustrated in Table 2. Also shown in Table 2 is anoutput signal level in dBmV for a specific input signal level.

TABLE 2 Input Output Output Net Output Gain Stage Attenuator Stage StageGain Level Index (dB) (dB) (dB) Mode (dB) (dBmV) 5 15 −34 −4 Bypass −2310 6 15 −33 −4 Bypass −22 11 7 15 −32 −4 Bypass −21 12 8 15 −31 −4Bypass −20 13 9 15 −30 −4 Bypass −19 14 10 15 −29 −4 Bypass −18 15 11 15−28 −4 Bypass −17 16 12 15 −27 −4 Bypass −16 17 13 15 −26 −4 Bypass −1518 14 15 −25 −4 Bypass −14 19 15 15 −24 −4 Bypass −13 20 16 15 −23 −4Bypass −12 21 17 15 −22 −4 Bypass −11 22 18 15 −21 −4 Bypass −10 23 1915 −20 −4 Bypass −9 24 20 15 −19 −4 Bypass −8 25 21 15 −18 −4 Bypass −726 22 15 −17 −4 Bypass −6 27 23 15 −16 −4 Bypass −5 28 24 15 −15 −4Bypass −4 29 25 15 −14 −4 Bypass −3 30 26 15 −13 −4 Bypass −2 31 27 15−12 −4 Bypass −1 32 28 15 −11 −4 Bypass 0 33 29 15 −10 −4 Bypass 1 34 3015 −9 −4 Bypass 2 35 31 15 −8 −4 Bypass 3 36 32 15 −7 −4 Bypass 4 37 3315 −6 −4 Bypass 5 38 34 15 −5 −4 Bypass 6 39 35 15 −4 −4 Bypass 7 40 3615 −3 −4 Bypass 8 41 37 15 −2 −4 Bypass 9 42 38 15 −1 −4 Bypass 10 43 3915 0 −4 Bypass 11 44 40 15 −7 4 Amplify A 12 45 41 15 −6 4 Amplify A 1346 42 15 −5 4 Amplify A 14 47 43 15 −4 4 Amplify A 15 48 44 15 −3 4Amplify A 16 49 45 15 −2 4 Amplify A 17 50 46 15 −1 4 Amplify A 18 51 4715 0 4 Amplify A 19 52 48 15 −7 12 Amplify B 20 53 49 15 −6 12 Amplify B21 54 50 15 −5 12 Amplify B 22 55 51 15 −4 12 Amplify B 23 56 52 15 −312 Amplify B 24 57 53 15 −2 12 Amplify B 25 58 54 15 −1 12 Amplify B 2659 55 15 0 12 Amplify B 27 60 56 15 −7 20 Amplify C 28 61 57 15 −6 20Amplify C 29 62 58 15 −5 20 Amplify C 30 63 59 15 −4 20 Amplify C 31 6460 15 −3 20 Amplify C 32 65 61 15 −2 20 Amplify C 33 66 62 15 −1 20Amplify C 34 67 63 15 0 20 Amplify C 35 68

Table 2 documents four modes of operation for the example of an outputstage 730. In a first mode, which is a bypass mode in this example, asignal is routed through the bypass path 750 and not routed through thevariable gain amplifier 740. In this mode the signal travels through thefixed attenuator 760, resulting in a gain of −4 dB applied by the outputstage 730, for example. In addition to the bypass mode, there are threeamplify modes wherein the signal is routed through the variable gainamplifier 740 and not routed through the bypass path 750. In each of theamplify modes, the signal is routed through the variable gain amplifier740 that applies a respective gain to the signal. In one example of theamplifier system 700 discussed above, the first amplify mode of thevariable gain amplifier 740 applies a 4 dB gain to the signal, thesecond amplify mode of the variable gain amplifier 740 applies a 12 dBgain to the signal, and the third amplify mode of the variable gainamplifier 740 applies a 20 dB gain to the signal.

FIG. 7B is a graph of third order intermodulation (IM3) performance forthe above example of an amplifier system 700 with respect to outputsignal levels from 10 dBmV to 68 dBmV. Each of three ripples 770 in thegraph occurs at a transition point when the mode of the output stage 730changes from the bypass mode, to first amplify mode, to second amplifymode, and to third amplify mode, respectively, as the output signallevel increases. A dashed line represents a performance limit met bythis example of the amplifier system 700, which may, for example,correspond to DOCSIS 3.1 performance requirements. FIG. 7C is a graph ofnoise figure versus output signal levels. The ripples 780 on this graphsimilarly occur at the transition points when the output stage 730changes from bypass, to first, second, and third amplify modes,respectively from left to right on the graph. Again a dashed linerepresents a performance limit met by this example of the amplifiersystem 700, which may similarly correspond to DOCSIS 3.1 performancerequirements. FIG. 7D is a graph of estimated power consumption versusoutput signal levels. The steps 790 on this graph represent increasingpower requirements, from left to right, of the variable gain amplifier740 as the output stage 730 mode changes from the bypass mode, to thefirst, second, and third amplify modes wherein the variable gainamplifier 740 provides 4 dB of gain, 12 dB of gain, and 20 dB of gain,respectively.

As shown in FIG. 7D, the amplifier system 700 has reduced powerrequirements at lower output signal levels. At least in part, powerreductions are achieved for lower desired output signal levels byreducing amplification of the variable gain amplifier 740, which isaccomplished by disabling one or more unit cells of semiconductors,transistors, or other amplifier elements when the desired output signallevel is relatively low, as discussed in more detail below. In someembodiments, power consumption is further reduced by adjusting anamplifier bias signal, which may be a bias current or a bias voltage, toincrease efficiency.

The variable gain amplifier 740 may be coupled to a power supply thatmay provide source power to the variable gain amplifier 740 in the formof a bias current, which ultimately provides the power of the outputsignal provided by the variable gain amplifier 740. The bias currentprovided to the variable gain amplifier 740 may be varied based on theneeds of the variable gain amplifier 740 for a particular output levelsetting of the amplifier system 700. For example, the first, second, andthird amplify modes of the variable gain amplifier 740 may not eachrequire the same amount of bias current to provide the first, second,and third amplification gains, for example, 4 dB, 12 dB, and 20 dB.Further efficiency may be achieved, in some embodiments, by adjustingthe bias current for a particular amplification gain based upon theparticular output level setting. For example, as shown in Table 2, thethird amplify mode of the variable gain amplifier 740 is utilized toprovide eight distinct output power levels based upon a desired outputpower level setting. While there are eight such settings, referenced asgain index values 56-63 in Table 2, for example, in which the variablegain amplifier 740 provides a gain of 20 dB, the bias signal provided tothe variable gain amplifier 740 may be adjusted for each of the eightsettings, to result in more efficient power consumption, based upon adesired output power level setting being achieved by varying theadjustable attenuator 320, which reduces the signal level at the inputof the variable gain amplifier 740.

For a selected output signal level, and in at least one embodiment, anamplifier bias signal may be determined that provides enough power tothe variable gain amplifier 740 to provide the desired output signallevel with sufficient linearity and/or noise characteristics withoutproviding additional power beyond that required. An amplifier biassignal determined necessary for a particular output signal level may belower than an amplifier bias signal determined necessary for a differentoutput signal level, even for the same gain characteristic of an amplifymode of the variable gain amplifier 740. Each determined value ofamplifier bias signal, e.g., for different desired output signal levels,may be recorded in a storage element, such as a lookup table, aregister, or similar, and retrieved by a controller, for example, tocontrol the amplifier bias signal provided for each output signal levelsetting. In the example of the amplifier system 700 discussed above, toprovide a range of amplification and output signal levels as illustratedby gain index values 40-63 in Table 2, a transmit signal is routedthrough the variable gain amplifier 740. When the transmit signal isrouted through the variable gain amplifier 740, the variable gainamplifier 740 operates in one of the first, second, or third amplifymodes to provide a gain of 4 dB, 12 dB, or 20 dB, respectively.

Table 3 shows, among other things, an example of a set of amplifier biassignal settings for gain index values 40-63 of this example of anamplifier system 700, and illustrates that within a given amplify mode,an amplifier bias signal is increased as the output signal levelincreases. In this example, the values for the bias signal shown inTable 3 are register values provided to a current digital to analogconverter (IDAC) that may provide a reference current from which a biascurrent is mirrored. Accordingly, the values of the bias signal shown inTable 3 do not represent a current or voltage value, but may be indexvalues for a current or voltage. In some embodiments, the bias signalvalues may linearly represent a bias current or voltage (e.g., a valueof 12 in Table 3 may represent a bias signal that is 20% higher than avalue of 10 in Table 3). In other embodiments, bias signal values may beany value, not necessarily linearly representative of a bias current orvoltage.

TABLE 3 Amp 740 Gain Amp 740 Amp 740 Gain Net Gain Output Level IndexBias Signal Mode (dB) (dB) (dBmV) 40 15 Amplify A 4 12 45 41 15 AmplifyA 4 13 46 42 15 Amplify A 4 14 47 43 16 Amplify A 4 15 48 44 17 AmplifyA 4 16 49 45 18 Amplify A 4 17 50 46 19 Amplify A 4 18 51 47 20 AmplifyA 4 19 52 48 10 Amplify B 12 20 53 49 10 Amplify B 12 21 54 50 10Amplify B 12 22 55 51 11 Amplify B 12 23 56 52 12 Amplify B 12 24 57 5314 Amplify B 12 25 58 54 17 Amplify B 12 26 59 55 19 Amplify B 12 27 6056 11 Amplify C 20 28 61 57 11 Amplify C 20 29 62 58 12 Amplify C 20 3063 59 13 Amplify C 20 31 64 60 14 Amplify C 20 32 65 61 15 Amplify C 2033 66 62 17 Amplify C 20 34 67 63 19 Amplify C 20 35 68

FIG. 7E is a graph of power consumption similar to FIG. 7D except thatFIG. 7E incorporates adjusted bias current for each net gain, e.g., fordiffering output signal level settings. The dashed line plotted in FIG.7E is a reproduction of the power consumption shown in FIG. 7D, forreference, and the solid curve plotted in FIG. 7E is the adjusted powerconsumption when an adjusted bias current is incorporated as discussedabove. It is to be appreciated that while the example of the amplifiersystem 700 discussed above includes three amplify modes, each of whichis used to provide a set of eight overall gain values, and accordingly aset of eight output signal levels, this is merely an example of one setof such values. Other embodiments of an amplifier system in accord withaspects and embodiments described herein may include more or feweramplify modes with more or fewer gain settings, and various gain valuesand output signal levels may be provided by one or more amplify orbypass modes.

In certain examples, the variable gain amplifier 740 may be configuredto maintain, or controlled to maintain, a substantially constantinput-referred linearity across various combinations of the range ofgain values and attenuation levels of the associated amplifier system.As discussed herein, input-referred linearity may refer to various typesof measurements of linearity of the variable gain amplifier 740, asreferenced at an input of the variable gain amplifier 740. For instance,in one example the variable gain amplifier 740 may be a high-linearitycomplementary metal-oxide-semiconductor (CMOS) power amplifier whichmaintains a substantially constant (e.g., ±1 or ±3dB) input-referredthird order intercept point (IIP3) for each of a plurality of amplifymodes and substantially across the full spectrum of the DOCSIS 3.1specification (i.e., from 5-204 MHz). In various implementations, theparticular tolerance range of variations in the IIP3 may depend on theparticular performance requirements of the variable gain amplifier 740and associated amplifier system. For instance, in some examples a slightvariability in IIP3 may be tolerated to improve the power efficiency ofthe variable gain amplifier 740.

FIG. 8 is a schematic diagram of a cable modem 800 incorporating anamplifier system 810 in accord with aspects and embodiments disclosedherein. The amplifier system 810 includes a fixed gain amplifier 812, anadjustable attenuator 814, a variable gain amplifier 816, and a bypasspath 818, in a manner similar to the amplifier system 700 previouslydescribed with respect to FIG. 7A. The fixed gain amplifier 812,adjustable attenuator 814, variable gain amplifier 816, and bypass path818 may each be differential elements having two differential inputs andtwo differential outputs, or may be single-sided elements having asingle input and a single output relative to a reference potential,e.g., ground. The amplifier system 810 also includes a controller 820that controls settings of the fixed gain amplifier 812, the adjustableattenuator 814, and the variable gain amplifier 816, as discussedfurther below, as well as controlling various switches 822 that mayroute a signal through various elements, and for example, may route asignal through the variable gain amplifier 816 or alternatively throughthe bypass path 818. The controller 820 may receive instructions via acontrol interface 824 from, e.g., a digital transceiver 830. The digitaltransceiver 830 receives and generates digital data signals tocommunicate user data from a local network to the CMTS.

When transmitting, the digital transceiver 830 provides a digitaltransmit signal 832 to a digital to analog converter (DAC) 834. The DAC834 converts the digital transmit signal 832 into analog signals, whichmay be further processed by one or more other components 836, e.g.,filtered, up-converted, and the like, before being provided to the inputof the amplifier system 810 at the fixed gain amplifier 812. Theamplifier system 810 applies a variable gain to the transmit signal toincrease or decrease the signal level in accord with configurationinstructions provided to the controller 820 by, e.g., the digitaltransceiver 830. The desired gain typically may be selected by thedigital transceiver 830 in response to commands from the CMTS toincrease or decrease the transmit signal level.

A balun 840 may be used to couple the transmit signal (provided by theamplifier system 810 at the desired signal level) to a coaxial cableconnector 842. The balun 840 converts the signal from a differential andbalanced form to an unbalanced form, and may also match the signal tothe impedance of a cable expected to be connected to the connector 842,e.g., 75 Ohms in typical coaxial cable distribution systems.Additionally, the transmit signal may pass through a duplexer 844. Theduplexer 844 separates transmit signals from receive signals by, forexample, separating signals by frequency range, for example with acombination of a high pass filter and a low pass filter. The duplexer844 may provide received signals to a low noise amplifier 850 thatamplifies the received signals prior to a conversion into digital formby an analog to digital converter (ADC) 852 that provides a digitalreceive signal 854 to the digital transceiver 830. Also illustrated inFIG. 8 are power connections 860, 862 that may independently providepower to the fixed gain amplifier 812 and the variable gain amplifier816 via inductors 864, 866. For example, in at least one embodiment, thefixed gain amplifier 812 may be supplied from a 3.3V supply and thevariable gain amplifier 816 may be supplied from a 10V supply. Asdescribed further below, a bias current or voltage supplied to either ofthe fixed gain amplifier 812 or the variable gain amplifier 816 may bevaried to improve the efficiency of the stage or amplifier.

It is to be appreciated that while the amplifier system 810 illustratedin FIG. 8 is shown having differential components (e.g., amplifiers,attenuators, inputs, outputs, etc.) and is shown coupled to a balun,alternate embodiments may be single-sided or may process unbalancedsignals, and may not require a balun at the output to couple to atransmission medium, or may require a balun in an alternate embodimentto couple an unbalanced output signal to a balanced transmission medium.Additionally, in certain embodiments, an amplifier system may be coupledto power without inductors, such as inductors 864, 866, or may becoupled to a power source through alternate or additional components.Additionally, any components necessary for coupling to a power sourcemay be provided as part of the amplifier system, e.g., internal to theamplifier system rather than external to the amplifier system as shownin FIG. 8

As discussed above, it is to be appreciated that not all elements of acable modem are shown in FIG. 8, additional components and circuitry maybe included that are not shown, such as up-converters anddown-converters, for example.

An amplifier system in accord with aspects and embodiments describedherein may be implemented in a number of physical technologies andtopologies. An amplifier system may include an input stage amplifier, anadjustable attenuator, a variable gain amplifier, and a bypass signalpath, or any combination or subset of these, implemented in variousarrangements and manufactured from various techniques. Any of thesecomponents may be implemented in a substrate or in a die and may bedesigned for and manufactured from various semiconductor materials, suchas Silicon (Si), Germanium (Ge), Gallium Arsenide (GaAs), for example,using various design technologies, such as complementary metal-oxidesemiconductor (CMOS), Silicon on insulator (SOI), double-diffusedmetal-oxide semiconductor (DMOS), laterally diffused metal-oxidesemiconductor (LDMOS), bipolar CMOS/DMOS (BCD), pseudomorphichigh-electron-mobility transistor (pHEMT), enhancement/depletion mode(E/D-mode) pHEMT, or various combinations of these or other materialsand technologies.

In at least one embodiment, an amplifier system may include a fixed gainamplifier implemented on a GaAs ED-pHEMT die, a digital switchedattenuator (DSA) implemented on an SOI die, a variable gain amplifierimplemented on a BCD-LDMOS die, and a controller implemented on a bulkCMOS die. Each of the dies may be mounted upon or coupled to a substratewith interconnections to each other within the substrate, or by otherconducting materials, to convey signals between the various inputs,outputs, and controlled elements of each die, and the set of dies on thesubstrate may be packaged into a multi-chip module (MCM) with a physicalformat suitable for incorporation into a device, such as a cable modem,by, for example, mounting and/or soldering to a circuit board.

FIG. 9 shows an example of an amplifier system 900, similar in manner tothe amplifier system 810 described above with respect to FIG. 8,implemented as a multi-chip module. The amplifier system 900 has aninput 902 for receiving balanced differential transmit signals and anoutput 904 for providing balanced differential transmit signals ofdiffering signal levels. The amplifier system 900 includes multiple chipdies, as described individually in more detail below, provided on asubstrate 910. A first die 920 is coupled to the input 902 and includesa fixed gain amplifier 922. A second die 930 is coupled to the output ofthe fixed gain amplifier 922 and includes a switch 934 a thatselectively couples the output of the fixed gain amplifier 922 to anadjustable digital switched attenuator 932, and switches 934 b, 934 cthat selectively route the transmit signal from the output of thedigital switched attenuator 932 to either of a fixed attenuator 936,e.g., a loss pad, in a bypass mode, or to a third die 940 that includesa variable gain amplifier 942, in an amplify mode. The switches 934 maybe multiple switches as shown or may be fewer switches implemented with,e.g., single-pole double-throw switches that alternately make aconnection to one or another signal path. In some embodiments, some ofthe switches 934 may be configured to enable a signal path uponreceiving a particular control signal and others of the switches 934 maybe configured to disable a signal path upon receiving a similar controlsignal. In some embodiments, inverters may be provided such that asingle control signal may cause some of the switches 934 to enable asignal path and cause others of the switches 934 to disable a signalpath. The switches 934 may be implemented as transistors or any suitabletechnology.

The amplifier system 900 also includes a fourth die 950 that includes acontroller 952 that provides control signals to components included onone or more of the first, second, and third dies. For example, thecontroller 952 may communicate with or control the attenuation settingsof the digital switched attenuator 932, control amplify modes and gainvalues of the variable gain amplifier 942, control bias levels (e.g.,current or voltage) provided to the fixed gain amplifier 922 and/or tothe variable gain amplifier 942, and control the switches 934 to placethe output stage in bypass mode or amplify mode and to establish theoverall net gain of the amplifier system 900. The controller 952 maycontrol the various components based upon instructions it receives via acontrol interface 954.

Although not shown in FIG. 9, in certain embodiments the amplifiersystem 900, and corresponding multi-chip module, may further include areceive path amplifier, such as the low noise amplifier 850 illustratedin FIG. 8, for example.

FIG. 10 is a set of graphs illustrating performance characteristics foran amplifier system, such as the amplifier systems 700, 810, 900described above, having a fixed gain amplifier as an input stage, anadjustable attenuator, and a variable gain amplifier with a bypass pathas an output stage, with specifications as described by Table 4. Theamplifier system associated with the results shown in FIG. 10 includesbias control, as discussed above, wherein a bias current (or voltage)provided to the variable gain amplifier (a component of the outputstage) depends upon the selected output power level setting, to increasepower efficiency, the effect of which can be seen in the powerconsumption graph for output signal levels above 45 dBmV. In someembodiments, a bias level (e.g., current or voltage) provided to thefixed gain amplifier may be controlled in a similar and/or variablemanner.

TABLE 4 Frequency Range 5 MHz to 204 MHz Input Stage Fixed GainAmplifier, (e.g., Low Noise Amplifier) Gain: 15 dB (fixed) Noise FIG.: 1dB Input IP3: 15 dBm Output IP3: 30 dBm Adjustable Attenuator Selectable0-34 dB attenuation in 1 dB steps Output Stage Variable Gain AmplifierGain: 4, 12, 20 dB (selectable) Noise FIG.: 10, 9, 8 dBm Input IP3: 30dBm (all gain settings) Output IP3: 34, 42, 50 dBm Bypass Path 4 dB LossPad

During the low gain mode of operation the variable gain amplifier 942may provide a total of 4 dB of gain, during the medium gain mode thevariable gain amplifier 942 may provide a total of 12 dB of gain, andduring the high gain mode the variable gain amplifier 942 may provide atotal of 20 dB of gain. Table 5 illustrates one example of the gain (indB), noise figure (in dB), input-referred third order intercept point(IIP3) (in dB), output-referred third order intercept point (OIP3) (indB), and estimated Power Consumption (in watts) of an amplifier system(e.g., the amplifier system 900 of FIG. 9) including the variable gainamplifier 942, during the low gain, medium gain, high gain, and bypassmodes of operation.

TABLE 5 Power Gain NF IIP3 OIP3 Consumption (dB) (dB) (dBm) (dBm) (W)High Gain Mode 20 8 30 50 5.6 Medium Gain Mode 12 9 30 42 0.89 Low GainMode 4 10 30 34 0.14 Bypass Mode −4 4 inf inf 0

In at least one embodiment, an amplifier system may be provided as apackaged multi-chip module, with packaging such as an overmold thatsubstantially encapsulates the substrate and the various dies andcomponents thereon, and including connectivity to the exterior of thepackaging to provide signal and control interconnections. An amplifiersystem in accord with aspects and embodiments described herein may beprovided on a single chip or die and may be packaged into a chip-scalepackage. Any of an amplifier system, multi-chip module, or chip-scalepackage as described herein may be used as an upstream amplifier for,e.g., a DOCSIS cable modem, or as a selectable-gain signal amplifier forany suitable application, such as a radio frequency amplifier or part ofa front-end module. Component characteristics may be altered to providean amplifier system in accord with aspects and embodiments describedherein to provide amplification across a number of frequency ranges,gain values, output levels, linearity, noise characteristics, and otherperformance criterion to be suitable for various applications andchanging operational parameters.

Referring again to FIG. 9, in at least one embodiment, the first die 920is implemented with GaAs ED-pHEMT technology, the second die 930 isimplemented with SOI technology, the third die 940 is implemented withBCD-LDMOS technology, and the fourth die 950 is implemented with CMOStechnology. In at least one embodiment, an amplifier system such as theamplifier system 900 of FIG. 9 may include a receive amplifier, such asthe low noise amplifier 850 illustrated in FIG. 8.

Referring to FIGS. 8 and 9, each illustrates a controller 820, 952,respectively, to provide control signals to various components of theassociated amplifier systems as described herein. For example, acontroller may provide control signals to control attenuation settings,gain settings, signal routing switches, power supply (e.g., bias)settings, and other components to establish operational characteristicsof an amplifier system. A controller, such as the controllers 820, 952,may establish operational characteristics of the amplifier system inresponse to commands from another device or component, such as thedigital transceiver 854 of FIG. 8. Accordingly, such a controller mayhave a control interface, such as control interfaces 824, 954.Additionally, a controller may control the timing of changes applied tovarious components to prevent or reduce conflicts, electrical shorts,spurious emissions, signal transients, disallowed or undesirable states,or changes in input or output impedances, and the like. Examples of acontrol interface 824, 954 include, but are not limited to, a serialperipheral interface (SPI) or serial data interface (SDI), generalpurpose input/output (GPIO), mobile industry processor interface (MIPI),or the like. Additionally, the controller may control the variouscomponents of the amplifier system via direct or indirect control linesor via similar communication interfaces to those described above coupledto other controllers associated with the component being controlled. Forexample, an adjustable digital switched attenuator may have its owncontroller in communication with the amplifier system controller and/ora variable gain amplifier may have its own controller in communicationwith the amplifier system controller.

Thus, referring to FIG. 11, there is illustrated one example of a system1100 incorporating an amplifier assembly 1110, which may include theamplifier systems 810 or 900, for example, and a controller 1120. Theamplifier assembly 1110 receives an input 1112 and provides an amplifiedoutput 1114. As shown in FIG. 11, the input 1112 may be a differentialinput, and the output 1114 may be a differential output.

The controller 1120 may include first and second bias circuits 1122 and1124 for biasing components of the amplifier assembly 1110, as discussedabove. The controller 1120 includes a controller core 1130 that providescontrol for the biasing circuits 1122 and 1124, and which may provideadditional control signals to the amplifier assembly 1110 via controlline(s) 1132. As discussed above, the controller core 1130 may providecontrol signals to control attenuation settings, gain settings, signalrouting switches, power supply settings, and other components toestablish operational characteristics of the amplifier assembly 1110,for example. The controller core 1130 may receive instructions orcommands from one or more external components, as discussed above, andmay provide feedback or other information to one or more externalcomponents over signal line(s) 1142, which are optionally routed throughan input/output buffer 1140.

In certain examples, the controller 1120 includes a power-on-resetcircuit 1150 that establishes a startup configuration. For example, whenpower is applied, the power-on-reset circuit 1150 may clear or resetregisters or other memory, set registers to appropriate initial values,establish baseline parameters via the control lines 1132, reset theinput/output buffer 1140, and establish initial communication orparameters for the signal line(s) 1142.

The controller 1120 may further include an oscillator 1160 incommunication with the controller core 1130. The oscillator 1160 mayprovide a reference signal to allow the controller 1120 to control thetiming of changes applied to various components. The controller 1120 maycontrol the timing of changes to various components to prevent or reducespurious emissions, signal transients, disallowed or undesirable states,changes in input or output impedances, and the like. In certainembodiments, the oscillator 1160 may be temperature compensated, and insome embodiments may be a differential resistive-capacitive relaxationoscillator.

Having described above several aspects of at least one example, it is tobe appreciated various alterations, modifications, and improvements willreadily occur to those skilled in the art. Such alterations,modifications, and improvements are intended to be part of thisdisclosure and are intended to be within the scope of the invention.Accordingly, the foregoing description and drawings are by way ofexample only, and the scope of the invention should be determined fromproper construction of the appended claims, and their equivalents.

What is claimed is:
 1. A broadband amplifier assembly having a signal input and a signal output, comprising: a fixed gain amplifier having an input and an output, the input coupled to the signal input; an adjustable attenuator having an input and an output, the input of the adjustable attenuator being coupled to the output of the fixed gain amplifier; a variable gain amplifier having an input coupled to the output of the adjustable attenuator and an output coupled to the signal output; and a controller configured to maintain a linear relationship between a power level at the input of the variable gain amplifier and a power level at the signal output across a range of output power levels of the broadband amplifier assembly by adjusting an amount of attenuation provided by the adjustable attenuator to reduce power consumption of the broadband amplifier assembly across the range of output power levels of the broadband amplifier assembly.
 2. The amplifier assembly of claim 1 wherein the variable gain amplifier has at least one amplify mode.
 3. The amplifier assembly of claim 2 wherein the controller is configured to control the at least one amplify mode of the variable gain amplifier.
 4. The amplifier assembly of claim 1 further comprising a bypass path switchably coupled in parallel to the variable gain amplifier and one or more switches configured to switchably route a signal through one of the variable gain amplifier and the bypass path.
 5. The amplifier assembly of claim 2 wherein the bypass path includes a bypass attenuator.
 6. The amplifier assembly of claim 3 wherein the bypass attenuator is a fixed attenuator.
 7. The amplifier assembly of claim 3 wherein the bypass attenuator has an input impedance substantially matched to an output impedance of the adjustable attenuator and an output impedance substantially matched to an impedance of the signal output.
 8. The amplifier assembly of claim 7 wherein the input impedance of the bypass attenuator has a value different from a value of the output impedance.
 9. A broadband amplifier assembly having a signal input and a signal output, comprising: a fixed gain amplifier having an input and an output, the input coupled to the signal input; an adjustable attenuator having an input and an output, the input of the adjustable attenuator being coupled to the output of the fixed gain amplifier; a variable gain amplifier having an input coupled to the output of the adjustable attenuator and an output coupled to the signal output; and a controller configured to tune an amount of gain provided by the variable gain amplifier by adjusting a bias signal provided to the variable gain amplifier and adjust an amount of attenuation provided by the adjustable attenuator to reduce power consumption across a range of output power levels at the signal output of the broadband amplifier assembly.
 10. The amplifier assembly of claim 9 further comprising a bypass path switchably coupled in parallel to the variable gain amplifier and one or more switches configured to switchably route a signal through one of the variable gain amplifier and the bypass path.
 11. The amplifier assembly of claim 10 wherein the bypass path includes a bypass attenuator.
 12. The amplifier assembly of claim 9 wherein the variable gain amplifier has at least one amplify mode.
 13. The amplifier assembly of claim 12 wherein the controller is configured to control the at least one amplify mode of the variable gain amplifier.
 14. The amplifier assembly of claim 12 wherein adjusting the bias signal further comprises reducing the bias signal to reduce the amount of gain provided by the variable gain amplifier within the at least one amplify mode.
 15. The amplifier assembly of claim 12 wherein the controller is configured to adjust the bias signal within the at least one amplify mode based upon at least one of a desired signal level at the signal output, a signal level at the input of the variable gain amplifier, and the amount of attenuation provided by the adjustable attenuator.
 16. The amplifier assembly of claim 9 wherein the controller is configured to adjust the bias signal based upon a lookup table.
 17. A method for reducing power consumption in a broadband amplifier assembly, the method comprising: receiving an input signal having an input signal level at the signal input; selecting one of a plurality of amplify modes for a variable gain amplifier, the selected amplify mode being selected based on the input signal level and a desired output signal level at the signal output; amplifying the input signal by a fixed amount to provide an amplified input signal; adjusting an amount of attenuation provided by an adjustable attenuator based on the selected amplify mode of the variable gain amplifier and the desired output signal level to provide an attenuator output signal; and reducing a level of a bias signal provided to the variable gain amplifier within the selected amplify mode to provide an output signal at the desired output signal level.
 18. The method of claim 17 wherein reducing the level of the bias signal provided to the variable gain amplifier reduces an amount of gain provided by the variable gain amplifier.
 19. The method of claim 17 further comprising switchably routing the attenuator output signal through the variable gain amplifier instead of a bypass path that bypasses the variable gain amplifier to provide the output signal at the desired output signal level.
 20. The method of claim 19 wherein reducing the level of the bias signal provided to the variable gain amplifier includes reducing the bias signal within the selected amplify mode based upon the desired signal level at the signal output, a signal level of the attenuator output signal, and an amount of gain provided by the selected amplifier mode. 